Venu Gundlapally Email & Phone Number | Strong academic background in Digital and Analog VLSI design. My course work coupled with projects gave me firm foundation in electrical and computer engineering. As a graduate research assistant, I had the opportunity to explore various design tools and gained practical experience. Excellent knowledge of theoretical and practical fundamentals of analog electronics as well as experimental engineering techniques helped me in an innovative circuit design for my thesis "VLSI implementation of position control in vehicles.” Specialties: I have solid hands on experience in CAD, analog and digital circuit design, designing IC's and layouts, and an extensive knowledge of Verilog hardware description language.

Venu Gundlapally

Strong academic background in Digital and Analog VLSI design. My course work coupled with projects g...
Austin, Texas, United States

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Venu Gundlapally’s Email venu.gundlapally@intel.com

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Venu Gundlapally’s Location Austin, Texas, United States

Venu Gundlapally’s Current Industry Intel

Venu Gundlapally’s Prior Industry University Of Houston | College Of Technology University Of Houston

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ELectrical Validation Engineer

2011-10-01T00:00:00.000Z - Present

Graduate Research Assistant

2008-08-01T00:00:00.000Z - 2011-05-01T00:00:00.000Z

Graduate Research Assistant

2007-08-01T00:00:00.000Z - 2008-05-01T00:00:00.000Z

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Venu Gundlapally is a Strong academic background in Digital and Analog VLSI design. My course work coupled with projects gave me firm foundation in electrical and computer engineering. As a graduate research assistant, I had the opportunity to explore various design tools and gained practical experience. Excellent knowledge of theoretical and practical fundamentals of analog electronics as well as experimental engineering techniques helped me in an innovative circuit design for my thesis "VLSI implementation of position control in vehicles.” Specialties: I have solid hands on experience in CAD, analog and digital circuit design, designing IC's and layouts, and an extensive knowledge of Verilog hardware description language.