Varun Chauhan Email & Phone Number | Working as soc design engineer in Intel (Bangalore) • Work on Subsystem development (CPUSS, DISPLAY, PCIE,ethernet) • Developing digital micro architecture spec and Perform RTL coding • Implement and execute power management flow • Develop synthesis constraints and perform logic synthesis • Run Lint, CDC checking and equivalence checking • Developing automation flows to improve the design quality and productivity • Usage of EDA tools, including simulators (VCS, VCS_NLP), synthesis tools (DC), low power (VCLP) • Power management with multiple power domains • Work with DV team to develop test cases and debug • Work with the physical design teams in aiding the implementation of the functional blocks • Working experience with high performance industry standard buses like AMBA AXI AND APB • Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains .E-mail id varunchauhan3581@gmail.com mob. 8123519046

Varun Chauhan

Working as soc design engineer in Intel (Bangalore) • Work on Subsystem development (CPUSS, DISPLAY,...
Bengaluru, Karnataka, India

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Varun Chauhan’s Email varun.chauhan@intel.com

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Varun Chauhan’s Location Bengaluru, Karnataka, India

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Soc Design Engineer

Present

Intern

2014-07-01 00:00:00 - 2015-01-01 00:00:00

Trainee

2013-06-01 00:00:00 - 2013-08-01 00:00:00

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Varun Chauhan is a Working as soc design engineer in Intel (Bangalore) • Work on Subsystem development (CPUSS, DISPLAY, PCIE,ethernet) • Developing digital micro architecture spec and Perform RTL coding • Implement and execute power management flow • Develop synthesis constraints and perform logic synthesis • Run Lint, CDC checking and equivalence checking • Developing automation flows to improve the design quality and productivity • Usage of EDA tools, including simulators (VCS, VCS_NLP), synthesis tools (DC), low power (VCLP) • Power management with multiple power domains • Work with DV team to develop test cases and debug • Work with the physical design teams in aiding the implementation of the functional blocks • Working experience with high performance industry standard buses like AMBA AXI AND APB • Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains .E-mail id varunchauhan3581@gmail.com mob. 8123519046