Suraj Nair Email & Phone Number | SoC Design Engineer at Intel - Experience with ASIC Design Methodology development. Master of Science in Electrical and Computer Engineering at Portland State University (GPA: 3.9) Major Circuits designed during Masters: Opamp (45nm), Low Power CW Transmitter (10.14MHz) - Analog IC Design, FSK Receiver (2.4GHz-2.6GHz) - RF Circuit Design.. Lab experience in RF/Microwave circuit design, test and measurement using VNA, Signal Generators, LPKF and soldering. Experience using ADS. Worked as TA for Digital IC Design and Microwave Circuit Design courses (graduate level) at PSU. About 3 years work experience in Analog pre-silicon Verification and Behavioral Modeling at Wipro Technologies. (Bangalore, India and Austria). Experienced in Cadence Virtuoso Layout / Schematic Editor / ADE (Analog Design Environment) / Hierarchy Editor /Spectre Simulator, Cadence SimVision.

Suraj Nair

SoC Design Engineer at Intel - Experience with ASIC Design Methodology development. Master of Scien...
Portland, Oregon, United States

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Suraj Nair’s Email suraj.nair@intel.com

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Suraj Nair’s Location Portland, Oregon, United States

Suraj Nair’s Current Industry Intel

Suraj Nair’s Prior Industry Portland State University | Wipro Technologies | Paladion Networks

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SoC Design Engineer

2014-05-01 00:00:00 - Present

Teaching Assistant - Microwave Circuit Design (Graduate Level)

2014-01-01 00:00:00 - 2014-03-01 00:00:00

Analog Mixed Signals Verification Engineer

2009-12-01 00:00:00 - 2012-07-01 00:00:00

Software Developer

2009-02-01 00:00:00 - 2009-11-01 00:00:00

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Suraj Nair is a SoC Design Engineer at Intel - Experience with ASIC Design Methodology development. Master of Science in Electrical and Computer Engineering at Portland State University (GPA: 3.9) Major Circuits designed during Masters: Opamp (45nm), Low Power CW Transmitter (10.14MHz) - Analog IC Design, FSK Receiver (2.4GHz-2.6GHz) - RF Circuit Design.. Lab experience in RF/Microwave circuit design, test and measurement using VNA, Signal Generators, LPKF and soldering. Experience using ADS. Worked as TA for Digital IC Design and Microwave Circuit Design courses (graduate level) at PSU. About 3 years work experience in Analog pre-silicon Verification and Behavioral Modeling at Wipro Technologies. (Bangalore, India and Austria). Experienced in Cadence Virtuoso Layout / Schematic Editor / ADE (Analog Design Environment) / Hierarchy Editor /Spectre Simulator, Cadence SimVision.