Shreya Tekade Email & Phone Number | Masters in Electrical Engineering with a specialization in Electronics and Mixed-Signal Circuit Design at Arizona State University. I worked as a co-op for 6 months under the Chip Design team at Mellanox Technologies where I gained experience in SOC front-end design. Proficient in writing optimized RTL blocks in System Verilog and Verilog. Technical Skills: Hardware Description Languages: Verilog, System Verilog Programming Languages: C, C++ Scripting Language: Python, Perl Processor Simulator: Gem5 Waveform Simulators: Cadence SimVision, ModelSim EDA Tools: Cadence Virtuoso, Cadence Innovus, HSPICE, Genesis2, Synopsys Design Compiler, Synopsys IC Validator (DRC, LVS), Synopsys PrimeTime Operating System: Windows, Linux Others: Machine Learning, Analog Design, FPGA.

Shreya Tekade

Masters in Electrical Engineering with a specialization in Electronics and Mixed-Signal Circuit Desi...
Greater Boston, Greater Boston, United States

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Shreya Tekade’s Email stekade@nvidia.com

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Shreya Tekade’s Location Greater Boston, Greater Boston, United States

Shreya Tekade’s Current Industry Nvidia

Shreya Tekade’s Prior Industry Mellanox Technologies

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ASIC Engineer

2020-06-01 00:00:00 - Present

Chip Design Intern

2019-07-01 00:00:00 - 2019-12-01 00:00:00

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Shreya Tekade is a Masters in Electrical Engineering with a specialization in Electronics and Mixed-Signal Circuit Design at Arizona State University. I worked as a co-op for 6 months under the Chip Design team at Mellanox Technologies where I gained experience in SOC front-end design. Proficient in writing optimized RTL blocks in System Verilog and Verilog. Technical Skills: Hardware Description Languages: Verilog, System Verilog Programming Languages: C, C++ Scripting Language: Python, Perl Processor Simulator: Gem5 Waveform Simulators: Cadence SimVision, ModelSim EDA Tools: Cadence Virtuoso, Cadence Innovus, HSPICE, Genesis2, Synopsys Design Compiler, Synopsys IC Validator (DRC, LVS), Synopsys PrimeTime Operating System: Windows, Linux Others: Machine Learning, Analog Design, FPGA.