Sharmeen Azim Email & Phone Number | 10+ years of experience in Synthesis, Floorplanning, Place and Route, Clock Tree Synthesis, Parasitics Extraction, Static Timing/SI Signoff , Power Analysis, Signal and Power EM Analysis, Formal Verification, Physical Verification Participated successfully in 8 tape outs using 40 nm, 28 nm, 16 nm , 7nm, 5 nm, and 4nm technology 2+ years of experience in Firmware Proven ability to work in a large global team meeting aggressive schedules Led and supervised offshore team of physical design engineers Technical Skills and Tools: - Synthesis (Synopsys Design Compiler) - Floorplanning, Place and Route, Clock Tree Synthesis (Atoptech Design Automation Tool) - Parasitics Extraction ( Synopsys STAR-RC, Cadence QRC) - Static Timing and Crosstalk Analysis (Synopsys Prime Time, Cadence Tempus) - Power Analysis (Apache Redhawk) - Signal and Power EM Analysis (Apache Redhawk) - Formal Verification (Synopsys LEC) - Physical Verification (Mentor Graphics Caliber DRC ) - Programming Languages: TCL, Perl, Verilog, C, C++, Java, Assembly Language, SQL, FORTRAN, and HTML - Platforms: Windows, UNIX, Linux, custom RTOS - Hardware: Flash, MIPS Architecture, Freescale Network Processor, CPLDs, Phy, Broadcom BME9600 - Bus Technologies: I2C, PCI, PCI-Express - Protocols: TCP, UDP, IP, Ethernet, TFTP, FTP, DHCP, ICMP - Source Control Tools: Rational Clearcase - Development Tools: Slick Edit, Visual Studio, Active TCL, ModelSim

Sharmeen Azim

10+ years of experience in Synthesis, Floorplanning, Place and Route, Clock Tree Synthesis, Parasit...
San Francisco Bay Area, San Francisco Bay Area, United States

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Sharmeen Azim’s Email sazim@tsmc.com

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Sharmeen Azim’s Location San Francisco Bay Area, San Francisco Bay Area, United States

Sharmeen Azim’s Current Industry Tsmc

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Work Experience

Tsmc

Principal Physical Design Engineer

2020-01-01 00:00:00 - Present

Eximius Design At Google

Physical Design Engineer

2018-02-01 00:00:00 - 2019-11-01 00:00:00

Primesilicon Technology At Esilicon

Physical Design Engineer

2017-05-01 00:00:00 - 2018-01-01 00:00:00

Primesilicon Technology At Inphi

Physical Design Engineer

2016-03-01 00:00:00 - 2017-04-01 00:00:00

Primesilicon Technology At Infinera

Physical Design Engineer

2014-08-01 00:00:00 - 2016-02-01 00:00:00

Primesilicon Technology At Clarify

Physical Design Engineer

2011-03-01 00:00:00 - 2014-08-01 00:00:00

Nortel Networks

Diagnostic Development Engineer

2007-06-01 00:00:00 - 2010-11-01 00:00:00

San Jose State University

Teaching Assistant, Computer Engineering Dept.

2007-01-01 00:00:00 - 2007-06-01 00:00:00

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Languages

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FAQ About Sharmeen Azim

Sharmeen Azim is located at
San Francisco Bay Area, San Francisco Bay Area, United States

Sharmeen Azim is a 10+ years of experience in Synthesis, Floorplanning, Place and Route, Clock Tree Synthesis, Parasitics Extraction, Static Timing/SI Signoff , Power Analysis, Signal and Power EM Analysis, Formal Verification, Physical Verification Participated successfully in 8 tape outs using 40 nm, 28 nm, 16 nm , 7nm, 5 nm, and 4nm technology 2+ years of experience in Firmware Proven ability to work in a large global team meeting aggressive schedules Led and supervised offshore team of physical design engineers Technical Skills and Tools: - Synthesis (Synopsys Design Compiler) - Floorplanning, Place and Route, Clock Tree Synthesis (Atoptech Design Automation Tool) - Parasitics Extraction ( Synopsys STAR-RC, Cadence QRC) - Static Timing and Crosstalk Analysis (Synopsys Prime Time, Cadence Tempus) - Power Analysis (Apache Redhawk) - Signal and Power EM Analysis (Apache Redhawk) - Formal Verification (Synopsys LEC) - Physical Verification (Mentor Graphics Caliber DRC ) - Programming Languages: TCL, Perl, Verilog, C, C++, Java, Assembly Language, SQL, FORTRAN, and HTML - Platforms: Windows, UNIX, Linux, custom RTOS - Hardware: Flash, MIPS Architecture, Freescale Network Processor, CPLDs, Phy, Broadcom BME9600 - Bus Technologies: I2C, PCI, PCI-Express - Protocols: TCP, UDP, IP, Ethernet, TFTP, FTP, DHCP, ICMP - Source Control Tools: Rational Clearcase - Development Tools: Slick Edit, Visual Studio, Active TCL, ModelSim

Sharmeen Azim currently works in the Tsmc |

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Sharmeen Azim has prior
experience in the following industries:
Eximius Design At Google | Primesilicon Technology At Esilicon | Primesilicon Technology At Inphi | Primesilicon Technology At Infinera | Primesilicon Technology At Clarify | Nortel Networks | San Jose State University

Sharmeen Azim has the following professional experience:
Tsmc | Eximius Design At Google | Primesilicon Technology At Esilicon | Primesilicon Technology At Inphi | Primesilicon Technology At Infinera | Primesilicon Technology At Clarify | Nortel Networks | San Jose State University