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Severino Legaspi

He has extensive experience in microelectronic IC packaging design & process development engineering...
San Francisco, California, United States

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Work Experience

Thin Film Electronics

Sr Engr/CM Manager, Integration & Assembly Manufacturing/Engineering

2015-01-01 00:00:00 - 2016-01-01 00:00:00

Flex

Sr Mfg Engr IV (Staff), Microelectronics Packaging (R&D)

2013-12-01 00:00:00 - 2015-10-01 00:00:00

Silicon Microstructures

Packaging & Process Devt Engineering

2010-12-01 00:00:00 - 2013-04-01 00:00:00

Quicklogic

Manager, Assembly Packaging Engg/ Quality&Rel Engg

2005-05-01 00:00:00 - 2008-06-01 00:00:00

Lsi Logic

Sr. Engineer,Assembly Packaging & Process Development Engg.

2001-05-01 00:00:00 - 2004-10-01 00:00:00

Advanced Interconnect Technologies

Section Manager/Supervisory Engr, Process Development Engg

1990-02-01 00:00:00 - 2000-01-01 00:00:00

Texas Instruments

Section Head (Manager), Process Engineering/Quality Engineering

1987-01-01 00:00:00 - 1990-01-01 00:00:00

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