Sarbashis Das Email & Phone Number | Sarbashis currently works full-time as a device engineer for Intel Corporation. Sarbashis completed his PhD in Electrical Engineering from Penn State University working with Prof. Saptarshi Das. His research involved studying novel transistors and circuits enabled using 2D materials for neuromorphic, straintronic, and sensing applications for the More than Moore and Beyond Moore domains. He has 6+ yrs of cleanroom experience, working on various CMOS fabrication processes such as lithography, deposition, etching, & material characterization. During his PhD, Sarbashis developed several process recipes for the fabrication of 2D material (MoS2/MoTe2) transistors on CMOS-compatible substrates. Also, he has a strong grasp on MOSFET electrical characterization by the application of MOSFET/low-dimensional device physics along with Landauer-based device modeling. Google Scholar profile: https://scholar.google.com/citations?hl=en&user=A6CeLYgAAAAJ

Sarbashis Das

Sarbashis currently works full-time as a device engineer for Intel Corporation. Sarbashis completed...
Hillsboro, Oregon, United States

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Sarbashis Das’s Email sarbashis@psu.edu

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Sarbashis Das’s Location Hillsboro, Oregon, United States

Sarbashis Das’s Current Industry Intel

Sarbashis Das’s Prior Industry Penn State University | Aricent

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Device Engineer

2024-07-01 00:00:00 - Present

Graduate Research Assistant

2020-01-01 00:00:00 - 2024-05-01 00:00:00

Software Engineer

2013-11-01 00:00:00 - 2015-07-01 00:00:00

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Sarbashis Das is a Sarbashis currently works full-time as a device engineer for Intel Corporation. Sarbashis completed his PhD in Electrical Engineering from Penn State University working with Prof. Saptarshi Das. His research involved studying novel transistors and circuits enabled using 2D materials for neuromorphic, straintronic, and sensing applications for the More than Moore and Beyond Moore domains. He has 6+ yrs of cleanroom experience, working on various CMOS fabrication processes such as lithography, deposition, etching, & material characterization. During his PhD, Sarbashis developed several process recipes for the fabrication of 2D material (MoS2/MoTe2) transistors on CMOS-compatible substrates. Also, he has a strong grasp on MOSFET electrical characterization by the application of MOSFET/low-dimensional device physics along with Landauer-based device modeling. Google Scholar profile: https://scholar.google.com/citations?hl=en&user=A6CeLYgAAAAJ