Ripan Das Email & Phone Number | I lead Server QoS team with hands-on SW/HW co-design experience specializing in profiling/optimizing compute, memory, and IO bottlenecks on server workloads including AI inference/finetuning on CPU/GPU. Passionate about democratizing AI solutions with open-source SW using commodity HW Domain expertise: Multi node/ multi thread Performance scale, Server TCO/Power/Performance/Cost trade off, Cost Optimized LLM Inference, Memory Subsystem Optimization. Hands on with Proxy workload/benchmark development/ Open source AI frame works such as Py-torch. developed C-based CPU memory/IO BW/latency performance evaluator; also multithreaded C++ memory addresses clustering tool to estimate effective cache requirement for applications.. Used Linux opens source as well as custom tools on various use cases such as AI inference , search, cache, OLTP to profile bottlenecks in HW CPU/Memory/NIC/Storage subsystems, tune SW frame-works, libraries such as MKL-DNN for performance; Lead CPU QoS features enabling , delivered industry-first fast HW QoS controller to mitigate cloud memory BW hog/noisy neighbor issues. Past experience with end to end Server and mobile platform power delivery design, battery charging SW/HW, analog/digital design for high speed IO, DDR, mixed signal validation, signal /power integrity simulation/analysis.

Ripan Das

I lead Server QoS team with hands-on SW/HW co-design experience specializing in profiling/optimizin...
20720 Northwest Dorado Lane, Beaverton, United States

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Ripan Das’s Email ripan.das@intel.com

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Ripan Das’s Location 20720 Northwest Dorado Lane, Beaverton, United States

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Intel

Principal Engineer

2021-03-01 00:00:00 - Present

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Ripan Das is located at
20720 Northwest Dorado Lane, Beaverton, United States

Ripan Das is a I lead Server QoS team with hands-on SW/HW co-design experience specializing in profiling/optimizing compute, memory, and IO bottlenecks on server workloads including AI inference/finetuning on CPU/GPU. Passionate about democratizing AI solutions with open-source SW using commodity HW Domain expertise: Multi node/ multi thread Performance scale, Server TCO/Power/Performance/Cost trade off, Cost Optimized LLM Inference, Memory Subsystem Optimization. Hands on with Proxy workload/benchmark development/ Open source AI frame works such as Py-torch. developed C-based CPU memory/IO BW/latency performance evaluator; also multithreaded C++ memory addresses clustering tool to estimate effective cache requirement for applications.. Used Linux opens source as well as custom tools on various use cases such as AI inference , search, cache, OLTP to profile bottlenecks in HW CPU/Memory/NIC/Storage subsystems, tune SW frame-works, libraries such as MKL-DNN for performance; Lead CPU QoS features enabling , delivered industry-first fast HW QoS controller to mitigate cloud memory BW hog/noisy neighbor issues. Past experience with end to end Server and mobile platform power delivery design, battery charging SW/HW, analog/digital design for high speed IO, DDR, mixed signal validation, signal /power integrity simulation/analysis.