Rhushikesh Prabhune Email & Phone Number | Skill Set: Computer Architecture: CPU Microarchitecture, Memory sub-system, Branch Prediction, Memory Dependence Prediction, Value/Address Prediction, SMT, Single-ISA heterogeneous multi-core processor, reconfigurable processor, GP-GPU architecture. Compilers: LLVM API, VLIW, profiling, code generation, static scheduling, and compiler optimizations. Operating Systems: Multi-threading, Synchronization, Virtual Memory Systems, CPU Scheduling, Storage, and File System, Drivers. I am interested in HW/SW co-design, architecture modeling, processor performance tuning, simulator, compiler, and systems programming roles.

Rhushikesh Prabhune

Skill Set: Computer Architecture: CPU Microarchitecture, Memory sub-system, Branch Prediction, Memo...
Santa Clara, California, United States

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Rhushikesh Prabhune’s Email rprabhune@qualcomm.com

Rhushikesh Prabhune’s Phone Numbers +1 858-651-****

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Rhushikesh Prabhune’s Location Santa Clara, California, United States

Rhushikesh Prabhune’s Current Industry Qualcomm

Rhushikesh Prabhune’s Prior Industry Telecom Sudparis | Indian Institute Of Science

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CPU Architecture and Performance Engineer

2021-06-01 00:00:00 - Present

Remote Intern

2018-06-01 00:00:00 - 2019-05-01 00:00:00

Research Assistant

2018-07-01 00:00:00 - 2018-12-01 00:00:00

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Rhushikesh Prabhune is a Skill Set: Computer Architecture: CPU Microarchitecture, Memory sub-system, Branch Prediction, Memory Dependence Prediction, Value/Address Prediction, SMT, Single-ISA heterogeneous multi-core processor, reconfigurable processor, GP-GPU architecture. Compilers: LLVM API, VLIW, profiling, code generation, static scheduling, and compiler optimizations. Operating Systems: Multi-threading, Synchronization, Virtual Memory Systems, CPU Scheduling, Storage, and File System, Drivers. I am interested in HW/SW co-design, architecture modeling, processor performance tuning, simulator, compiler, and systems programming roles.