Radhika Chepuru Email & Phone Number | •VLSI, ASIC, logic design, SOC design - from RTL design to logic synthesis, verification, floorplanning, placement, and timing closure. •Good knowledge of Digital design, parasitic extractions ,DRC, LVS, Cadence, HSPICE, Encounter and Synopsys •Good working knowledge of VHDL, PERL, SKILL and TCL. Specialties: EDA Tools : ModelSim, Cadence NC,VHDL,HSPICE, Encounter, Synopsys tool Design Compiler, Sirocco, Xilinx, pathmill

Radhika Chepuru

•VLSI, ASIC, logic design, SOC design - from RTL design to logic synthesis, verification, floorplann...
Bengaluru, Karnataka, India

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Radhika Chepuru’s Location Bengaluru, Karnataka, India

Radhika Chepuru’s Current Industry Cadence Design Systems

Radhika Chepuru’s Prior Industry Intel | Broadcom | Qualcomm | Aricent Technologies

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Principal Design Engineer

2023-08-01 00:00:00 - Present

SOC Design Engineer

2018-04-01 00:00:00 - 2023-07-01 00:00:00

Member Of Technical Staff

2017-12-01 00:00:00 - 2018-03-01 00:00:00

Senior Engineer

2014-05-01 00:00:00 - 2017-11-01 00:00:00

Intern

2007-12-01 00:00:00 - 2008-04-01 00:00:00

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Radhika Chepuru is a •VLSI, ASIC, logic design, SOC design - from RTL design to logic synthesis, verification, floorplanning, placement, and timing closure. •Good knowledge of Digital design, parasitic extractions ,DRC, LVS, Cadence, HSPICE, Encounter and Synopsys •Good working knowledge of VHDL, PERL, SKILL and TCL. Specialties: EDA Tools : ModelSim, Cadence NC,VHDL,HSPICE, Encounter, Synopsys tool Design Compiler, Sirocco, Xilinx, pathmill