Prasanna Kunjar Email & Phone Number | With a solid foundation in VLSI design and a passion for innovation, I am a seasoned professional with extensive experience across various domains within the semiconductor industry. As a Debug Micro-architect, I excel in identifying and resolving complex design issues, ensuring efficient and high-quality outcomes. In my role as an IP Lead Digital Design Engineer, I have successfully managed the development and integration of key IPs, contributing to the overall success of several projects. My tenure as a Manager in VLSI-Chip design has further honed my leadership skills, enabling me to effectively guide teams towards achieving their goals. Having also worked in verification, I possess a holistic understanding of the design process, allowing me to implement robust verification strategies. My expertise extends to a wide range of tools, flows, and methodologies, ensuring that I stay at the forefront of industry trends and best practices. Throughout my career, I have had the opportunity to work in all areas of VLSI design at least once, providing me with a comprehensive view of the field. I am now looking to leverage my skills and experience to take on new challenges and drive innovation in the semiconductor industry.

Prasanna Kunjar

With a solid foundation in VLSI design and a passion for innovation, I am a seasoned professional wi...
Bengaluru, Karnataka, India

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Prasanna Kunjar’s Location Bengaluru, Karnataka, India

Prasanna Kunjar’s Current Industry Intel

Prasanna Kunjar’s Prior Industry Smartplay Technologies An Aricent | Maxim Integrated Products | Sasken | Cypress | Arcus Technology

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Debug micro-architect/IP digital Lead designer/Manager

2016-02-01T00:00:00.000Z - Present

Sr technical lead

2015-08-01T00:00:00.000Z - 2016-02-01T00:00:00.000Z

Principal Member Technical Staff

2002-08-01T00:00:00.000Z - 2015-07-01T00:00:00.000Z

Team Lead

2000-08-01T00:00:00.000Z - 2002-07-01T00:00:00.000Z

Senior Design Engineer

1999-08-01T00:00:00.000Z - 2000-07-01T00:00:00.000Z

Senior Design Engineer

1996-02-01T00:00:00.000Z - 1999-07-01T00:00:00.000Z

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Prasanna Kunjar is a With a solid foundation in VLSI design and a passion for innovation, I am a seasoned professional with extensive experience across various domains within the semiconductor industry. As a Debug Micro-architect, I excel in identifying and resolving complex design issues, ensuring efficient and high-quality outcomes. In my role as an IP Lead Digital Design Engineer, I have successfully managed the development and integration of key IPs, contributing to the overall success of several projects. My tenure as a Manager in VLSI-Chip design has further honed my leadership skills, enabling me to effectively guide teams towards achieving their goals. Having also worked in verification, I possess a holistic understanding of the design process, allowing me to implement robust verification strategies. My expertise extends to a wide range of tools, flows, and methodologies, ensuring that I stay at the forefront of industry trends and best practices. Throughout my career, I have had the opportunity to work in all areas of VLSI design at least once, providing me with a comprehensive view of the field. I am now looking to leverage my skills and experience to take on new challenges and drive innovation in the semiconductor industry.

Prasanna Kunjar has prior
experience in the following industries:
Smartplay Technologies An Aricent | Maxim Integrated Products | Sasken | Cypress | Arcus Technology

Prasanna Kunjar has the following professional experience:
Intel | Smartplay Technologies An Aricent | Maxim Integrated Products | Sasken | Cypress | Arcus Technology