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Prakash Appanna


Dublin, California, United States

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Work Experience

Cisco Systems

Technical Leader/Manager

2007-02-01 00:00:00 - Present

Matisse Networks

Lead FPGA Design Engineer

2005-11-01 00:00:00 - 2007-02-01 00:00:00

Alloptic

Senior FPGA/ASIC design engineer

2001-11-01 00:00:00 - 2004-09-01 00:00:00

Promatory Communications

Senior FPGA/ASIC Design Engineer

1999-01-01 00:00:00 - 2001-01-01 00:00:00

Nortel Networks

Senior FPGA/ASIC Design Engineer

2000-01-01 00:00:00 - 2001-01-01 00:00:00

Dsc Communications

Senior Hardware Design Engineer

1997-01-01 00:00:00 - 1999-01-01 00:00:00

Skills

No Skills Available

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