Paul Olivier Email & Phone Number | The question I am trying to answer with my research is: How can the processing in biological nervous systems be understood in non-computer terms such that a new field of engineering can be established, from philosophy to design methodology, for the development of systems that excel in uncertain environments, in particular, the performance of useful functions in society? Please see my research plan for more details. I am currently looking for a grant that would allow me to do this research on a permanent basis.Involved in: - Active member in Autosar consortium: Participating in Autosar requirements specification development for classic/adaptive platform security. - AutoSAR Basic SW component design, configuration, coding in C/C++. Mainly focused on communications components for a gateway controller. Involving tool development using Python. - Customer specifications analysis and system/SW requirements. Within the department of Basic Software (BSW) in the automotive sector, in particular, the design of Body Controller Module (BCM): - According to the framework and standards defined by AutoSAR for automotive software, the BSW layer implements the abstraction of application models from the BCM hardware. It is a layer of drivers and services through which the application can access the hardware features (buses, memory, lighting control, switches, data acquisition) of the BCM. - Development according to the V-Model: analysis of customer requirements and their conversion to system and software specifications. From the specifications, the design is done at functional/architectural and then detailed level, followed by implementation, which in turn is followed by unit and integration testing. Requirement management was based on DOORS - Design, implementation and testing of drivers to manage peripheral functionality such as PWM and ADC, as well as overload protection for the SPC Bolero 32-bit microcontroller from ST Microelectronics - Design, implementation and validation of a driver for an external smart power switch for control and protection of typically lighting loads, connected to the microcontroller via an SPI bus - Utilization of the Trace32 debug environment to validate and debug software executing on the BCN, with the BCM connected to a hardware load panel to simulate real-world interfaces and loads - Development of Trace32 scripts to access and log high-speed debug through the microcontrolleru2019s Nexus interface - Unit testing, using the C-Unit tool within the Visual Studio C environment - Integration testing, by using Python scripts that access microcontroller signals via the Trace32 connection. My doctorate proposes a new engineering-based solution for a nonbiological nervous system design framework that could one day provide ubiquitious presence of biological neural processing and organization in everyday devices. Such products will exhibit natural biological features such as reaching and maintaining equilibrium with its environment (that is, being successfully able to perform its task or reach its designed goal), incorporating mechanisms of adaptation, learning and evolution.- Analysis and validation of customer requirements, followed by development of software specifications - Design, implementation and testing of embedded software for the TMS320C6455 DSP, containing modules corresponding to the physical and link layers for a modem. - Designing a software architecture based on a real-time operating system uC/OS-II - Designing a software architecture and the corresponding real-time (deterministic) application, based on the concept of parallel emulation for a DSP - Designing a visualization tool for temporal execution of the modules within the DSP, with the generation of graphs for post-analysis using Matlab - Design of the interface between the DSP and FPGA - Generation of PC software (C language, data transfers across Ethernet/UDP) to test complete DSP and FPGA subsystem - Test program generation for C modules designed for the DSP - Integration, testing and validation of VHDL components consisting of bit and block coding/decoding, with parallel evaluation of Simulink models available for these components - Integration, test and validation of VHDL components for QPSK synchronization, with parallel evaluation of Simulink models available for these components - Generating VHDL testbenches for components, using ModelSim (simulation) and Matlab (test data generation and validation) - Implementation and testing of VHDL components of a QPSK modem design in FPGA Altera Statrix-II. - The project's objective was to develop a system with high data acquisition sampling rates and which allow the integration of a large number of channels (up to 128 channels distributed across 4 systems with clock-synchronized sampling). The system was highly modular (in terms of the front-end channel types supported and their combinations) and had a Gigabit Ethernet connection to a host PC which was running visualization software and post-analysis. - Design, implementation and testing of embedded software running under the real-time operating system VxWorks and running on the main board based on the VME bus and a PowerPC processor. The software was written in C. - Design, implementation and testing of software for CAN protocol modules, including a dual-CAN PMC (PCI Mezzanine Card) located on the main VME board. The software was written in assembly, running on a Freescale DSP56303 DSP - Design, implementation and testing of a VxWorks driver for the PMC CAN. The software was written in assembly, running on a Freescale DSP56301 DSP - VHDL implementation of a bus interface for communication between devices on the CAN modules, running on a CPLD - Design and implementation of test applications on a PC WIN32 Host with an Ethernet (TCP and UDP) connection to the data acquisition system to validate the design of VxWorks and CAN module applications - Adaptation of an HMI application developed in C # under Visual Studio. NET allowing validation and calibration of data acquisition systems after production or as part of maintenance.

Paul Olivier

The question I am trying to answer with my research is: How can the processing in biological nervous...
Barcelona, Barcelona, Spain

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Paul Olivier’s Location Barcelona, Barcelona, Spain

Paul Olivier’s Current Industry Universitat Politu00e8cnica de Catalunya TTTech Auto Iberia

Paul Olivier’s Prior Industry Lear Corporation | Indra Espacio | Mecalc

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Work Experience

Universitat Politu00e8cnica de Catalunya

PHD Student

2019-09-01 00:00:00 - Present

TTTech Auto Iberia

Embedded Software Engineer

2017-05-01 00:00:00 - Present

Lear Corporation

Software Engineer

2012-04-01 00:00:00 - 2017-04-01 00:00:00

Indra Espacio

Firmware Developer

2008-05-01 00:00:00 - 2012-03-01 00:00:00

Mecalc

Senior Project Engineer

2000-01-01 00:00:00 - 2007-08-01 00:00:00

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FAQ About Paul Olivier

Paul Olivier is located at
Barcelona, Barcelona, Spain

Paul Olivier is a The question I am trying to answer with my research is: How can the processing in biological nervous systems be understood in non-computer terms such that a new field of engineering can be established, from philosophy to design methodology, for the development of systems that excel in uncertain environments, in particular, the performance of useful functions in society? Please see my research plan for more details. I am currently looking for a grant that would allow me to do this research on a permanent basis.Involved in: - Active member in Autosar consortium: Participating in Autosar requirements specification development for classic/adaptive platform security. - AutoSAR Basic SW component design, configuration, coding in C/C++. Mainly focused on communications components for a gateway controller. Involving tool development using Python. - Customer specifications analysis and system/SW requirements. Within the department of Basic Software (BSW) in the automotive sector, in particular, the design of Body Controller Module (BCM): - According to the framework and standards defined by AutoSAR for automotive software, the BSW layer implements the abstraction of application models from the BCM hardware. It is a layer of drivers and services through which the application can access the hardware features (buses, memory, lighting control, switches, data acquisition) of the BCM. - Development according to the V-Model: analysis of customer requirements and their conversion to system and software specifications. From the specifications, the design is done at functional/architectural and then detailed level, followed by implementation, which in turn is followed by unit and integration testing. Requirement management was based on DOORS - Design, implementation and testing of drivers to manage peripheral functionality such as PWM and ADC, as well as overload protection for the SPC Bolero 32-bit microcontroller from ST Microelectronics - Design, implementation and validation of a driver for an external smart power switch for control and protection of typically lighting loads, connected to the microcontroller via an SPI bus - Utilization of the Trace32 debug environment to validate and debug software executing on the BCN, with the BCM connected to a hardware load panel to simulate real-world interfaces and loads - Development of Trace32 scripts to access and log high-speed debug through the microcontrolleru2019s Nexus interface - Unit testing, using the C-Unit tool within the Visual Studio C environment - Integration testing, by using Python scripts that access microcontroller signals via the Trace32 connection. My doctorate proposes a new engineering-based solution for a nonbiological nervous system design framework that could one day provide ubiquitious presence of biological neural processing and organization in everyday devices. Such products will exhibit natural biological features such as reaching and maintaining equilibrium with its environment (that is, being successfully able to perform its task or reach its designed goal), incorporating mechanisms of adaptation, learning and evolution.- Analysis and validation of customer requirements, followed by development of software specifications - Design, implementation and testing of embedded software for the TMS320C6455 DSP, containing modules corresponding to the physical and link layers for a modem. - Designing a software architecture based on a real-time operating system uC/OS-II - Designing a software architecture and the corresponding real-time (deterministic) application, based on the concept of parallel emulation for a DSP - Designing a visualization tool for temporal execution of the modules within the DSP, with the generation of graphs for post-analysis using Matlab - Design of the interface between the DSP and FPGA - Generation of PC software (C language, data transfers across Ethernet/UDP) to test complete DSP and FPGA subsystem - Test program generation for C modules designed for the DSP - Integration, testing and validation of VHDL components consisting of bit and block coding/decoding, with parallel evaluation of Simulink models available for these components - Integration, test and validation of VHDL components for QPSK synchronization, with parallel evaluation of Simulink models available for these components - Generating VHDL testbenches for components, using ModelSim (simulation) and Matlab (test data generation and validation) - Implementation and testing of VHDL components of a QPSK modem design in FPGA Altera Statrix-II. - The project's objective was to develop a system with high data acquisition sampling rates and which allow the integration of a large number of channels (up to 128 channels distributed across 4 systems with clock-synchronized sampling). The system was highly modular (in terms of the front-end channel types supported and their combinations) and had a Gigabit Ethernet connection to a host PC which was running visualization software and post-analysis. - Design, implementation and testing of embedded software running under the real-time operating system VxWorks and running on the main board based on the VME bus and a PowerPC processor. The software was written in C. - Design, implementation and testing of software for CAN protocol modules, including a dual-CAN PMC (PCI Mezzanine Card) located on the main VME board. The software was written in assembly, running on a Freescale DSP56303 DSP - Design, implementation and testing of a VxWorks driver for the PMC CAN. The software was written in assembly, running on a Freescale DSP56301 DSP - VHDL implementation of a bus interface for communication between devices on the CAN modules, running on a CPLD - Design and implementation of test applications on a PC WIN32 Host with an Ethernet (TCP and UDP) connection to the data acquisition system to validate the design of VxWorks and CAN module applications - Adaptation of an HMI application developed in C # under Visual Studio. NET allowing validation and calibration of data acquisition systems after production or as part of maintenance.

Paul Olivier currently works in the Universitat Politu00e8cnica de Catalunya | TTTech Auto Iberia |

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Paul Olivier has prior
experience in the following industries:
Lear Corporation | Indra Espacio | Mecalc

Paul Olivier has the following professional experience:
Universitat Politu00e8cnica de Catalunya | TTTech Auto Iberia | Lear Corporation | Indra Espacio | Mecalc