Patrick Kelleher Email & Phone Number | A self-motivated, enthusiastic & versatile Principal Analog design and layout Engineer with extensive design & development experience. 20+ years’ experience in the IC design industry working on Analog & Mixed Signal Design block design and layout in 28nm/40nm/65nm/90nm/130nm/180nm deep submicron IC design. Top-level layout: Floor planning, power routing, ESD, block physical design size estimations, layout effort estimations and chip finishing. AMS chip verification: Verification of RF and Analog/mixed-signal (AMS) integrated circuits and AMS verification methodology development using real number modelling. Worked in area such as L-band Satellite Modem/Handset RF ICs, L-Band Dual band full-duplex satellite transceiver IC, mmWave test chip, receivers for high bit-rate DSL applications, Power management ICs, USB 2.0 PHY, PCI Express PHY,

Patrick Kelleher

A self-motivated, enthusiastic & versatile Principal Analog design and layout Engineer with extensiv...
Ireland

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Patrick Kelleher’s Phone Numbers +1 408-588-****

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Patrick Kelleher’s Location Ireland

Patrick Kelleher’s Current Industry Renesas Electronics

Patrick Kelleher’s Prior Industry Dialog Semiconductor | Adesto Technologies | Silicon And Software Systems | S3

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Principal Analog Design Engineer

2021-08-01T00:00:00.000Z - Present

Senior Analog Design Engineer

2020-07-01T00:00:00.000Z - 2021-08-01T00:00:00.000Z

Senior Ic Design Engineer At S3 Semiconductors

2018-05-01T00:00:00.000Z - 2020-07-01T00:00:00.000Z

Senior Ic Design Engineer

2014-01-01T00:00:00.000Z - 2018-04-01T00:00:00.000Z

Mixed Signal Design Engineer

1997-08-01T00:00:00.000Z - 2013-12-01T00:00:00.000Z

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Patrick Kelleher is a A self-motivated, enthusiastic & versatile Principal Analog design and layout Engineer with extensive design & development experience. 20+ years’ experience in the IC design industry working on Analog & Mixed Signal Design block design and layout in 28nm/40nm/65nm/90nm/130nm/180nm deep submicron IC design. Top-level layout: Floor planning, power routing, ESD, block physical design size estimations, layout effort estimations and chip finishing. AMS chip verification: Verification of RF and Analog/mixed-signal (AMS) integrated circuits and AMS verification methodology development using real number modelling. Worked in area such as L-band Satellite Modem/Handset RF ICs, L-Band Dual band full-duplex satellite transceiver IC, mmWave test chip, receivers for high bit-rate DSL applications, Power management ICs, USB 2.0 PHY, PCI Express PHY,

Patrick Kelleher has prior
experience in the following industries:
Dialog Semiconductor | Adesto Technologies | Silicon And Software Systems | S3

Patrick Kelleher has the following professional experience:
Renesas Electronics | Dialog Semiconductor | Adesto Technologies | Silicon And Software Systems | S3