Pan Wenrong Email & Phone Number | - Project Management Professionals (PMP score : MPMMP) - 9 years+ use C++, SV-VMM, SV-UVM for verification and Verilog for design - Master in building automation platform for verification environment. - Familiar with function & assertion coverage, assertion and etc. - Familiar with script language such as ruby, perl, tcl, cshell, makefile. - Familiar with ASIC develop flow and SoC on FPGA design flow. - Familiar with Ethernet switch knowledge. - Skilled in Chip accelerator

Pan Wenrong

- Project Management Professionals (PMP score : MPMMP) - 9 years+ use C++, SV-VMM, SV-UVM for verif...
Beijing City, Beijing City, China

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Pan Wenrong’s Location Beijing City, Beijing City, China

Pan Wenrong’s Current Industry Cadence Design Systems

Pan Wenrong’s Prior Industry Acconsys | Sondrel Ltd | Huawei Hisilicon | Chengdu Rising top technology LTD

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Principal Application Engineer

2018-04-01 00:00:00 - Present

SoC Verification Engineer

2013-05-01 00:00:00 - 2014-05-01 00:00:00

Senior Verification Engineer

2012-05-01 00:00:00 - 2013-05-01 00:00:00

IC Verification Project leader

2007-08-01 00:00:00 - 2012-04-01 00:00:00

FPGA designer

2006-06-01 00:00:00 - 2007-01-01 00:00:00

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Pan Wenrong is a - Project Management Professionals (PMP score : MPMMP) - 9 years+ use C++, SV-VMM, SV-UVM for verification and Verilog for design - Master in building automation platform for verification environment. - Familiar with function & assertion coverage, assertion and etc. - Familiar with script language such as ruby, perl, tcl, cshell, makefile. - Familiar with ASIC develop flow and SoC on FPGA design flow. - Familiar with Ethernet switch knowledge. - Skilled in Chip accelerator - Skilled in Rails on Ruby

Pan Wenrong has prior
experience in the following industries:
Acconsys | Sondrel Ltd | Huawei Hisilicon | Chengdu Rising top technology LTD

Pan Wenrong has the following professional experience:
Cadence Design Systems | Acconsys | Sondrel Ltd | Huawei Hisilicon | Chengdu Rising top technology LTD