Mayuresh Dawoo Email & Phone Number | Technical Skills => • Software Languages/Tools: C, C#, C++, Java, JavaScript, Perl, Python, Visual Studio 2010, MATLAB, Visual Sim, MVC ASP.NET, ADO .NET, HTML, CSS, SQL. • EDA Tools: Xilinx ISE, Altera Quartus, Virtuoso, Spectre, Encounter (Cadence), Design Compiler (Synopsis), LTspice. Advanced Design System, LabVIEW. • Hardware Skills: VHDL, Verilog, IC design, CMOS design, Logic synthesis, RTL design and verification, Layout design in CAD Tools, DRC, LVS, Low-power design, Floor-planning, Synthesis, Placement and Routing, FPGA and ASIC design, Static timing analysis.

Mayuresh Dawoo

Technical Skills => • Software Languages/Tools: C, C#, C++, Java, JavaScript, Perl, Python, Visual...
Redmond, Washington, United States

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Mayuresh Dawoo’s Email mayuresh.dawoo@intel.com

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Mayuresh Dawoo’s Location Redmond, Washington, United States

Mayuresh Dawoo’s Current Industry Intel

Mayuresh Dawoo’s Prior Industry Schweitzer Engineering Laboratories | Tata Consultancy Services

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SoC RTL Design Engineer

2022-04-01T00:00:00.000Z - Present

Lead Hardware Engineer

2021-07-01T00:00:00.000Z - 2022-04-01T00:00:00.000Z

Assistant Systems Engineer

2011-12-01T00:00:00.000Z - 2012-07-01T00:00:00.000Z

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Mayuresh Dawoo is a Technical Skills => • Software Languages/Tools: C, C#, C++, Java, JavaScript, Perl, Python, Visual Studio 2010, MATLAB, Visual Sim, MVC ASP.NET, ADO .NET, HTML, CSS, SQL. • EDA Tools: Xilinx ISE, Altera Quartus, Virtuoso, Spectre, Encounter (Cadence), Design Compiler (Synopsis), LTspice. Advanced Design System, LabVIEW. • Hardware Skills: VHDL, Verilog, IC design, CMOS design, Logic synthesis, RTL design and verification, Layout design in CAD Tools, DRC, LVS, Low-power design, Floor-planning, Synthesis, Placement and Routing, FPGA and ASIC design, Static timing analysis.