Jiaibing Email & Phone Number | 1. Over 10 years’ experience in developing 2D/3D NAND memory chip, including logic verification for 8 years. 2. All-rounded experience on verification skill sets, including random verification by UVM, assertion, function coverage, gate, interrupt. 3. Applying for a patent on interrupt verification methodology.

Jiaibing

1. Over 10 years’ experience in developing 2D/3D NAND memory chip, including logic verification for...
Yokohama, Yokohama, Japan

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Jiaibing ’s Email jiaibing_n@ymtc.com

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Jiaibing ’s Location Yokohama, Yokohama, Japan

Jiaibing ’s Current Industry Yangtze Memory Technologies

Jiaibing ’s Prior Industry Toshiba Information Systems

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テクニカルマネージャー

2018-08-01T00:00:00.000Z - Present

ロジック検証

2008-07-01T00:00:00.000Z - 2018-07-01T00:00:00.000Z

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Jiaibing is a 1. Over 10 years’ experience in developing 2D/3D NAND memory chip, including logic verification for 8 years. 2. All-rounded experience on verification skill sets, including random verification by UVM, assertion, function coverage, gate, interrupt. 3. Applying for a patent on interrupt verification methodology.