Greg Ward Email & Phone Number | Hired as a college intern by Motorola Semiconductor Product Sector in 2000, I began my career by analyzing the feasibility of low power digital strategies. After graduating with honors from The University of Texas at Austin in 2002, I assumed the responsibility of ensuring success of Body-Biasing Circuits and Systems in high-performance digital circuits in Motorola's 90nm basebands. I designed, simulated, layed-out, and delivered a Well Bias Charge Pump to regulate the NWELL and PWELL nodes of these high performance VLSI digital processors and instructed engineers world-wide on how to implement the novel digital topology on numerous production tapeouts. While 90nm body-biasing designs were going into fabrication, I joined the ARM-CORE integration team to understand design challenges of Power-Gated Circuits and Systems in 65nm fabrication processes. I learned the flow of RTL-to-GDS and contributed to the delivery of State-Retaining Power-Gated ARM1176 and CORTEXA8 in the LP-GP 65nm process. The ultra-nimble successful low power design (see i.MX27 and i.MX51) is capable of transitioning from 50uA sleep mode to 600Mhz(ARM1176)/900MHz(CORTEXA8) run mode in less than 500ns. In 2007, I began to work on novel microprocessors targeted to support the real time processing requirements of 3GPP's protocol for Long Term Evolution of Cellular (LTE). I developed flows for implementing power-gated versions of these processors until Freescale disbanded the Cellular Products Group in April 2009. In 2010 I signed with RIM to review low power processor designs,and have expanded my skillset to include system power design, PMIC integration, thermal control design, chip-level power estimation, and use case power optimization. Specialties: Design Specification and Documentation. Front-End to Back-End Implementation. Low Power System Definition. Post-Silicon Validation and Debug. Deep Submicron Digital Design and Implementation. Strategic Analysis of Design Risk. Microprocessor-based System Design. Implementation of Multi-Media and Communications Processors. Design Review and Refinement. Design Process Monitoring for Success. Design For Manufacturability. Thermal Control Systems, Inter-Disciplinary Collaboration. Design Pioneering.

Greg Ward

Hired as a college intern by Motorola Semiconductor Product Sector in 2000, I began my career by ana...
Austin, Texas, United States

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Greg Ward’s Email greg.ward@samsung.com

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Greg Ward’s Location Austin, Texas, United States

Greg Ward’s Current Industry Samsung Austin Research And Development Center And Advanced Computing Lab Samsung Austin R And D Center

Greg Ward’s Prior Industry Nvidia | Blackberry | Freescale

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Work Experience

Samsung Austin Research And Development Center And Advanced Computing Lab

Senior Staff Engineer

2019-03-01 00:00:00 - Present

Samsung Austin R And D Center

Senior Globals Power Engineer

2013-03-01 00:00:00 - Present

Nvidia

Senior Power Architect

2012-03-01 00:00:00 - 2013-03-01 00:00:00

Blackberry

Power and Thermal System Design and Analysis

2010-05-01 00:00:00 - 2012-02-01 00:00:00

Freescale

Low Power Architect and Power Grid Designer at Freescale Semiconductor

2000-05-01 00:00:00 - 2009-08-01 00:00:00

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FAQ About Greg Ward

Greg Ward is located at
Austin, Texas, United States

Greg Ward is a Hired as a college intern by Motorola Semiconductor Product Sector in 2000, I began my career by analyzing the feasibility of low power digital strategies. After graduating with honors from The University of Texas at Austin in 2002, I assumed the responsibility of ensuring success of Body-Biasing Circuits and Systems in high-performance digital circuits in Motorola's 90nm basebands. I designed, simulated, layed-out, and delivered a Well Bias Charge Pump to regulate the NWELL and PWELL nodes of these high performance VLSI digital processors and instructed engineers world-wide on how to implement the novel digital topology on numerous production tapeouts. While 90nm body-biasing designs were going into fabrication, I joined the ARM-CORE integration team to understand design challenges of Power-Gated Circuits and Systems in 65nm fabrication processes. I learned the flow of RTL-to-GDS and contributed to the delivery of State-Retaining Power-Gated ARM1176 and CORTEXA8 in the LP-GP 65nm process. The ultra-nimble successful low power design (see i.MX27 and i.MX51) is capable of transitioning from 50uA sleep mode to 600Mhz(ARM1176)/900MHz(CORTEXA8) run mode in less than 500ns. In 2007, I began to work on novel microprocessors targeted to support the real time processing requirements of 3GPP's protocol for Long Term Evolution of Cellular (LTE). I developed flows for implementing power-gated versions of these processors until Freescale disbanded the Cellular Products Group in April 2009. In 2010 I signed with RIM to review low power processor designs,and have expanded my skillset to include system power design, PMIC integration, thermal control design, chip-level power estimation, and use case power optimization. Specialties: Design Specification and Documentation. Front-End to Back-End Implementation. Low Power System Definition. Post-Silicon Validation and Debug. Deep Submicron Digital Design and Implementation. Strategic Analysis of Design Risk. Microprocessor-based System Design. Implementation of Multi-Media and Communications Processors. Design Review and Refinement. Design Process Monitoring for Success. Design For Manufacturability. Thermal Control Systems, Inter-Disciplinary Collaboration. Design Pioneering.

Greg Ward currently works in the Samsung Austin Research And Development Center And Advanced Computing Lab | Samsung Austin R And D Center |

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Greg Ward has prior
experience in the following industries:
Nvidia | Blackberry | Freescale

Greg Ward has the following professional experience:
Samsung Austin Research And Development Center And Advanced Computing Lab | Samsung Austin R And D Center | Nvidia | Blackberry | Freescale