Eric Olson Email & Phone Number | Software and Productivity engineer with hardware knowledge and ASIC/SoC experience: Experienced ASIC design & verification ecad/methodology productivity engineer with a demonstrated history of creating the flows for dozens of high-end CPU and computer networking ASICs. -- Strong engineering professional skilled in software development (C++/C#, perl, python, tcl, lisp/SKILL ...) with a background in computer-aided design, optimization algorithms, parsers, genetic algorithms, and machine learning. -- Solid EE/ASIC knowledge to facilitate circuit/timing analysis, systemVerilog design parsing, reuse methodologies, and design code generation (registers/ecc/memory wrappers/debug/interface/fifo/stitching). -- ASIC development experience that brings wisdom to methodology and best-practices decisions. Implemented continuous integration flow to internal SoC development and design verification. Implemented effective tool, IP and design reuse methodologies. -- Positive team member with global team coordination experience. Bringing innovation while enabling group productivity. Ability to bring good judgment to a constant flow of requests.

Eric Olson

Software and Productivity engineer with hardware knowledge and ASIC/SoC experience:...
Hillsboro, Oregon, United States

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Eric Olson’s Email eric.olson@intel.com

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Eric Olson’s Location Hillsboro, Oregon, United States

Eric Olson’s Current Industry Intel

Eric Olson’s Prior Industry Nokia | Cisco | Stratumone Communications | Sgi

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Frontend Methodology Developer

2021-06-01 00:00:00 - Present

Technical Lead: SoC Verification Flow Owner

2019-11-01 00:00:00 - 2021-06-01 00:00:00

Technical Lead: HW Tools Developer

1998-01-01 00:00:00 - 2019-05-01 00:00:00

ASIC Tools Developer

1998-01-01 00:00:00 - 2000-01-01 00:00:00

MTS

1995-01-01 00:00:00 - 1997-01-01 00:00:00

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Eric Olson is a Software and Productivity engineer with hardware knowledge and ASIC/SoC experience: Experienced ASIC design & verification ecad/methodology productivity engineer with a demonstrated history of creating the flows for dozens of high-end CPU and computer networking ASICs. -- Strong engineering professional skilled in software development (C++/C#, perl, python, tcl, lisp/SKILL ...) with a background in computer-aided design, optimization algorithms, parsers, genetic algorithms, and machine learning. -- Solid EE/ASIC knowledge to facilitate circuit/timing analysis, systemVerilog design parsing, reuse methodologies, and design code generation (registers/ecc/memory wrappers/debug/interface/fifo/stitching). -- ASIC development experience that brings wisdom to methodology and best-practices decisions. Implemented continuous integration flow to internal SoC development and design verification. Implemented effective tool, IP and design reuse methodologies. -- Positive team member with global team coordination experience. Bringing innovation while enabling group productivity. Ability to bring good judgment to a constant flow of requests.