Dipan Shah Email & Phone Number | Staff SOC Debug Engineer with over a decade of experience at Intel, specializing in driving complex problem resolution through innovative debug solutions. Leveraging deep expertise in signal processing, microcontrollers, C++, and Verilog, I excel at unraveling intricate SoC issues. As a key contributor to Intel's cutting-edge technology development, I am passionate about pushing the boundaries of electrical engineering to deliver next-generation solutions. Committed to fostering a culture of excellence and innovation, I am dedicated to shaping the future of the industry. Specialties: HDLs: System Verilog (IEEE 1800) • Verilog HDL (IEEE 1364) • VHDL SW Languages: C language • Basic Knowledge of Python EDA Tools: Synopsis VCS • Design Compiler • Xilinx ISE •Questa CDC Measurement tools: Oscilloscope, Logic Analyzer

Dipan Shah

Staff SOC Debug Engineer with over a decade of experience at Intel, specializing in driving complex...
Folsom, California, United States

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Dipan Shah’s Location Folsom, California, United States

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Staff SOC Debug Engineer

2022-04-01 00:00:00 - Present

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Dipan Shah is a Staff SOC Debug Engineer with over a decade of experience at Intel, specializing in driving complex problem resolution through innovative debug solutions. Leveraging deep expertise in signal processing, microcontrollers, C++, and Verilog, I excel at unraveling intricate SoC issues. As a key contributor to Intel's cutting-edge technology development, I am passionate about pushing the boundaries of electrical engineering to deliver next-generation solutions. Committed to fostering a culture of excellence and innovation, I am dedicated to shaping the future of the industry. Specialties: HDLs: System Verilog (IEEE 1800) • Verilog HDL (IEEE 1364) • VHDL SW Languages: C language • Basic Knowledge of Python EDA Tools: Synopsis VCS • Design Compiler • Xilinx ISE •Questa CDC Measurement tools: Oscilloscope, Logic Analyzer