Deep Gupta Email & Phone Number | Skill Set : 1. Design Full Custom Memories (L2/L3 Caches) 2. Physical Design Flow using ICC2 and Prime time. Floorplanning, Low power Design Techniques. multi voltage designs, PnR and STA. 2. Design Memory Compiler (High Density and VROM) 3. Timing Closure using Nanotime 4. EMIR 5. Bitcell Stability using Solido and ADM and WRM Design Experience : At Nvidia, In addition to independently designing and delivering High Density/ High BW Level 3/2 cache Memories for CPU, I have significant experience in leading 2 IPs (circuit and layout), customer interactions,complete design closure (lib release, static timing,em/ir/ spice / critical paths) , mentoring juniors. At AMD (Memory Compiler Experience) Designed,characterized HD SRAM complier. Also did SigEM and EMIR analysis of the same. At Samsung Electronics, South Korea Design Experience of 2 port CAM Memory including 2 Port Bitcell Design. Design Self timed High Speed VROM architecture. Including special differential sense amplifier with reference voltage generator. Design Experience of HD SRAM Memory Compiler. I did MS in Electrical Engineering from University of Southern California. bachelors in engineering technology from Delhi College in electronics and communication engineering. I did summer internship for 2 months at ST Microelectronics where i build a C code (Hardware Map File). to map hardware prototype to PC. During Masters i did several projects in VLSI ciricuit designing which include developing a basic artificial neural network for quarter backs under Dr. Alice Parker. I also implemented a 6 stage and 7 stage pipelined processor, in one of the courses. And in another course i also designed a speedy SRAM based DSP system.. I also worked on developing a network on chip router as the final project. During My undergrad i also did some projects like robotic leg and a small robotic car as my undergrad project.

Deep Gupta

Skill Set : 1. Design Full Custom Memories (L2/L3 Caches) 2. Physical Design Flow using ICC2 and P...
Bengaluru, Karnataka, India

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Deep Gupta’s Email deep.gupta@intel.com

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Deep Gupta’s Location Bengaluru, Karnataka, India

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Deep Gupta’s Prior Industry Tsmc North America | Nvidia | Amd | Samsung Electronics | University Of Southern California

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Work Experience

Intel

Senior Engineer

Present

Tsmc North America

Sr. Design Enginner

2020-02-01 00:00:00 - 2020-09-01 00:00:00

Nvidia

Sr Design Engineer

2014-09-01 00:00:00 - 2020-01-01 00:00:00

Amd

Senior Design Engineer

2013-07-01 00:00:00 - 2014-08-01 00:00:00

Samsung Electronics

Sram Design Engineer

2011-01-01 00:00:00 - 2013-06-01 00:00:00

University Of Southern California

Student

2008-08-01 00:00:00 - 2010-04-01 00:00:00

Skills

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Languages

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FAQ About Deep Gupta

Deep Gupta is located at
Bengaluru, Karnataka, India

Deep Gupta is a Skill Set : 1. Design Full Custom Memories (L2/L3 Caches) 2. Physical Design Flow using ICC2 and Prime time. Floorplanning, Low power Design Techniques. multi voltage designs, PnR and STA. 2. Design Memory Compiler (High Density and VROM) 3. Timing Closure using Nanotime 4. EMIR 5. Bitcell Stability using Solido and ADM and WRM Design Experience : At Nvidia, In addition to independently designing and delivering High Density/ High BW Level 3/2 cache Memories for CPU, I have significant experience in leading 2 IPs (circuit and layout), customer interactions,complete design closure (lib release, static timing,em/ir/ spice / critical paths) , mentoring juniors. At AMD (Memory Compiler Experience) Designed,characterized HD SRAM complier. Also did SigEM and EMIR analysis of the same. At Samsung Electronics, South Korea Design Experience of 2 port CAM Memory including 2 Port Bitcell Design. Design Self timed High Speed VROM architecture. Including special differential sense amplifier with reference voltage generator. Design Experience of HD SRAM Memory Compiler. I did MS in Electrical Engineering from University of Southern California. bachelors in engineering technology from Delhi College in electronics and communication engineering. I did summer internship for 2 months at ST Microelectronics where i build a C code (Hardware Map File). to map hardware prototype to PC. During Masters i did several projects in VLSI ciricuit designing which include developing a basic artificial neural network for quarter backs under Dr. Alice Parker. I also implemented a 6 stage and 7 stage pipelined processor, in one of the courses. And in another course i also designed a speedy SRAM based DSP system.. I also worked on developing a network on chip router as the final project. During My undergrad i also did some projects like robotic leg and a small robotic car as my undergrad project.

Deep Gupta currently works in the

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Deep Gupta has prior
experience in the following industries:
Tsmc North America | Nvidia | Amd | Samsung Electronics | University Of Southern California

Deep Gupta has the following professional experience:
Intel | Tsmc North America | Nvidia | Amd | Samsung Electronics | University Of Southern California