Atif Hussain Email & Phone Number | System on Chip Architecture and Infrastructure Design: SSD Controllers, Hardware Accelerators targeted for Video Processing Engines, and Imaging Subsystems for next generation ASIC/SOC intended for the Enterprise Storage, Automotive, Mobile and Tablet Market. Manager and Lead Designer / System Definition: Multiple designs including: Asynchronous interface for EMIF4D (Memory Interface to DDR), Data packing and protocol conversion block for Lens distortion and correction engine. System Memory Scheduler. Manage and Lead Design: ID Bus identification digital module that operates over a mixed signal range targeted for the Apple iPhone 5. Design Lead: Mustang Program (Wimax SOC) Design Lead/System Definition: OMAP3430 MPU SubSystem, AXI2OCP Protocol Converter. Program Manager/Design Lead: ARM925T MPU program. Design and integration of two-way virtual index virtual tag (VIVT) data cache. Lead Designer for embedded flash memory controller development. Designer for prototype electronic fuse controller. Specialties: SOC Architecture & Design, ASIC, Microprocessor Design, Low Power Design

Atif Hussain

System on Chip Architecture and Infrastructure Design: SSD Controllers, Hardware Accelerators target...
2817 Emporia Street, Denver, United States

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Atif Hussain’s Email atif.hussain@wdc.com

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Atif Hussain’s Location 2817 Emporia Street, Denver, United States

Atif Hussain’s Current Industry Western Digital

Atif Hussain’s Prior Industry Wd A Western Digital | Texas Instruments | Nasa National Aeronautics And Space Administration

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Senior Technologist ASIC Architecture and Design

2013-07-01 00:00:00 - Present

Design Manager and Project Lead ASIC Development

2013-01-01 00:00:00 - 2013-07-01 00:00:00

Senior Member Technical Staff

2007-02-01 00:00:00 - 2012-12-01 00:00:00

Research Assistant

1993-08-01 00:00:00 - 1995-01-01 00:00:00

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Atif Hussain is a System on Chip Architecture and Infrastructure Design: SSD Controllers, Hardware Accelerators targeted for Video Processing Engines, and Imaging Subsystems for next generation ASIC/SOC intended for the Enterprise Storage, Automotive, Mobile and Tablet Market. Manager and Lead Designer / System Definition: Multiple designs including: Asynchronous interface for EMIF4D (Memory Interface to DDR), Data packing and protocol conversion block for Lens distortion and correction engine. System Memory Scheduler. Manage and Lead Design: ID Bus identification digital module that operates over a mixed signal range targeted for the Apple iPhone 5. Design Lead: Mustang Program (Wimax SOC) Design Lead/System Definition: OMAP3430 MPU SubSystem, AXI2OCP Protocol Converter. Program Manager/Design Lead: ARM925T MPU program. Design and integration of two-way virtual index virtual tag (VIVT) data cache. Lead Designer for embedded flash memory controller development. Designer for prototype electronic fuse controller. Specialties: SOC Architecture & Design, ASIC, Microprocessor Design, Low Power Design

Atif Hussain has prior
experience in the following industries:
Wd A Western Digital | Texas Instruments | Nasa National Aeronautics And Space Administration

Atif Hussain has the following professional experience:
Western Digital | Wd A Western Digital | Texas Instruments | Nasa National Aeronautics And Space Administration