Aravindh Ganesh Email & Phone Number | An elecrical engineer who has specialised in the field of electronic design and hardware engineering. To obtain a challenging full term position in digital hardware and ASIC design, ASIC verification, circuit design, digital signal processing, computer architecture, embedded systems, Hardware design, Test Engineering. Summary of MS course work: Functional Verification using System Verilog(RTL), OOPs concepts. Circuit and physical level design\simulation(digital\analog)-Cadence schematic and layout Digital Signal Processing concepts and implementation in Matlab. Hardware design targeted for FPGA using Xilinix, ASIC using Verilog(RTL). Embedded Systems Concepts, Robotics. Proficient in C,C++, perl application programming and debugging. Computer Architecture concepts such as Cache, Memory Hierarchy, Branch predictors, Dynamic Scheduler. Specialties: Electronic design ASIC design, ASIC Verification, High speed Digital design, Digital electronics, VLSI, Computer Architecture, DSP, OOP concepts, System Verilog, RTL, Modelsim, cadence, hspice, DRC,LVS, C, C++, perl

Aravindh Ganesh

An elecrical engineer who has specialised in the field of electronic design and hardware engineering...
Hillsboro, Oregon, United States

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Aravindh Ganesh’s Email aravindh.ganesh@intel.com

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Aravindh Ganesh’s Location Hillsboro, Oregon, United States

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Hardware Design Engineer

2018-10-01 00:00:00 - Present

Senior Electrical Design Engineer

2010-10-01 00:00:00 - 2013-08-01 00:00:00

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Aravindh Ganesh is a An elecrical engineer who has specialised in the field of electronic design and hardware engineering. To obtain a challenging full term position in digital hardware and ASIC design, ASIC verification, circuit design, digital signal processing, computer architecture, embedded systems, Hardware design, Test Engineering. Summary of MS course work: Functional Verification using System Verilog(RTL), OOPs concepts. Circuit and physical level design\simulation(digital\analog)-Cadence schematic and layout Digital Signal Processing concepts and implementation in Matlab. Hardware design targeted for FPGA using Xilinix, ASIC using Verilog(RTL). Embedded Systems Concepts, Robotics. Proficient in C,C++, perl application programming and debugging. Computer Architecture concepts such as Cache, Memory Hierarchy, Branch predictors, Dynamic Scheduler. Specialties: Electronic design ASIC design, ASIC Verification, High speed Digital design, Digital electronics, VLSI, Computer Architecture, DSP, OOP concepts, System Verilog, RTL, Modelsim, cadence, hspice, DRC,LVS, C, C++, perl