Adnan Suleiman Email & Phone Number | I am digital design engineer worked on chip level and subsystem level design from concept to silicon sign off, including: requirements and specification, architectural development, RTL-level design, verification, block synthesis, Matlab and Verilog (SystemVerilog) modeling and simulation, post-layout simulation, chip-level verification and lab validation, and firmware development and verification. Planning, building and developing emulation environments. Run, bring up and test emulation models on Veloce, Zebu and Palladium. Setting up, building and developing, deploying and testing multi-board HAPS environments. I also bring 9 years of digital and mixed-signal product and test experience, including: generation of ATE hardware requirements and schematics, develop test program to support product characterization and production testing, debug and analyze device performance over process and operating conditions, and production solutions release. Yield analysis and enhancement, superb customer relation and RMA analysis and handling, across ATE platforms transfer and across fab technology transfer, and product and test group supervisory and leadership. Practical business management and entrepreneurial experience. For more on tools and technical experience, please request a resume.

Adnan Suleiman

I am digital design engineer worked on chip level and subsystem level design from concept to silicon...
Austin, Texas, United States

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Adnan Suleiman’s Email asuleiman@amd.com

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Adnan Suleiman’s Location Austin, Texas, United States

Adnan Suleiman’s Current Industry Amd

Adnan Suleiman’s Prior Industry Intel | Cirrus Logic | Freescale Semiconductor

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Senior Program Manager

2023-06-01 00:00:00 - Present

Staff Emulation Engineer

2017-01-01 00:00:00 - 2019-05-01 00:00:00

Digital Design Engineer

2009-01-01 00:00:00 - 2014-01-01 00:00:00

Product & Test Engineer

2000-01-01 00:00:00 - 2006-01-01 00:00:00

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Adnan Suleiman is a I am digital design engineer worked on chip level and subsystem level design from concept to silicon sign off, including: requirements and specification, architectural development, RTL-level design, verification, block synthesis, Matlab and Verilog (SystemVerilog) modeling and simulation, post-layout simulation, chip-level verification and lab validation, and firmware development and verification. Planning, building and developing emulation environments. Run, bring up and test emulation models on Veloce, Zebu and Palladium. Setting up, building and developing, deploying and testing multi-board HAPS environments. I also bring 9 years of digital and mixed-signal product and test experience, including: generation of ATE hardware requirements and schematics, develop test program to support product characterization and production testing, debug and analyze device performance over process and operating conditions, and production solutions release. Yield analysis and enhancement, superb customer relation and RMA analysis and handling, across ATE platforms transfer and across fab technology transfer, and product and test group supervisory and leadership. Practical business management and entrepreneurial experience. For more on tools and technical experience, please request a resume.